Codex Local
bf1233d5df
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Add customer and operator login, BLE provisioning, device fleet controls, call memory, memoir generation, and refreshed family and maintenance portals. Include API contracts, migrations, firmware sources, tests, assets, and deployment documentation.
130 lines
2.9 KiB
Plaintext
130 lines
2.9 KiB
Plaintext
CONFIG_IDF_CMAKE=y
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CONFIG_IDF_TARGET_ARCH_XTENSA=y
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CONFIG_IDF_TARGET="esp32s3"
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CONFIG_IDF_TARGET_ESP32S3=y
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CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009
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#
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# Make experimental features visible
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#
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CONFIG_IDF_EXPERIMENTAL_FEATURES=y
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#
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# Serial flasher config
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#
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CONFIG_BOOTLOADER_FLASH_DC_AWARE=y
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# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set
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CONFIG_SPI_FLASH_HPM_ENA=y
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# end of Serial flasher config
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#
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# Audio HAL
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#
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CONFIG_ESP32_S3_KORVO2_V3_BOARD=y
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# end of Audio HAL
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#
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# Audio Recorder
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#
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CONFIG_AFE_MIC_NUM=2
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# end of Audio Recorder
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#
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# ESP Speech Recognition
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#
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CONFIG_MODEL_IN_FLASH=y
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CONFIG_AFE_INTERFACE_V1=y
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CONFIG_SR_WN_WN9_HILEXIN=n
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# end of ESP Speech Recognition
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#
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# Component config
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#
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#
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# Driver configurations
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#
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#
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# mbedTLS
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#
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# CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC is not set
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CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC=y
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# CONFIG_MBEDTLS_HARDWARE_AES is not set
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# CONFIG_MBEDTLS_HARDWARE_SHA is not set
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# end of mbedTLS
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#
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# ESP32s3-PSRAM
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#
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CONFIG_SPIRAM_XIP_FROM_PSRAM=y
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#
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# ESP32S3-Specific
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#
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# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 is not set
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# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 is not set
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CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y
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CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=240
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#
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# Cache config
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#
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# CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB is not set
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CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB=y
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CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x8000
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# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set
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CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS=y
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CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS=8
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CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B=y
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CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE=32
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# CONFIG_ESP32S3_INSTRUCTION_CACHE_WRAP is not set
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# CONFIG_ESP32S3_DATA_CACHE_16KB is not set
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# CONFIG_ESP32S3_DATA_CACHE_32KB is not set
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CONFIG_ESP32S3_DATA_CACHE_64KB=y
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CONFIG_ESP32S3_DATA_CACHE_SIZE=0x10000
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# CONFIG_ESP32S3_DATA_CACHE_4WAYS is not set
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CONFIG_ESP32S3_DATA_CACHE_8WAYS=y
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CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS=8
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# CONFIG_ESP32S3_DATA_CACHE_LINE_32B is not set
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CONFIG_ESP32S3_DATA_CACHE_LINE_64B=y
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CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=64
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# CONFIG_ESP32S3_DATA_CACHE_WRAP is not set
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# end of Cache config
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CONFIG_ESP32S3_SPIRAM_SUPPORT=y
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#
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# SPI RAM config
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#
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CONFIG_SPIRAM_MODE_OCT=y
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CONFIG_SPIRAM_TYPE_AUTO=y
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# CONFIG_SPIRAM_SPEED_120M is not set
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_BOOT_INIT=y
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CONFIG_SPIRAM_USE_MALLOC=y
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CONFIG_SPIRAM_MEMTEST=y
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CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=4096
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CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP=y
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CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768
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# end of SPI RAM config
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# end of ESP32S3-Specific
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CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
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CONFIG_SPIRAM_SPEED_80M=y
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CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
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CONFIG_SR_WN_WN9_HILEXIN=y
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# EchoEar uses a 360x360 ST77916 QSPI panel. This choice also defines the
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# rendering dimensions consumed by volc_hal_display.c.
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CONFIG_EXAMPLE_LCD_INTERFACE_QSPI=y
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CONFIG_LWIP_TCP_SND_BUF_DEFAULT=32768
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CONFIG_LWIP_TCP_WND_DEFAULT=32768
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# Match a 32KiB TCP RX window: 32768 / 1440 MSS + 2 packets.
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CONFIG_LWIP_TCP_RECVMBOX_SIZE=24
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